主要从事宽温度范围低压低功耗&高精度模拟前端电路（AFE）设计和仿真EDA模型研究，在IEEE JSSC，IEEE TCAS-1, IEEE TCAS-2等集成电路领域国际顶刊和会议发表论文20余篇。主持国家自然科学基金青年项目1项，作为项目骨干参与了科技部重点研发计划等项目的研究工作。 

• 2007-2011 四川大学，学士，商学院

• 2010-2012 日本早稻田大学，硕士，理工研究科

• 2012-2017 日本早稻田大学，博士，理工研究科

• 2017-2019 日本早稻田大学，博士后，理工研究科

• 2019-至今 中国科学技术大学，特任副研究员

• Jing Wang, Jun He, Man-Kay Law, Xinzhe Wang, Futian Liang, Lin Cheng, “A 76.9 ppm/K Nano Watt PVT-Insensitive CMOS Voltage Reference Operating From 4 to 300 K for Integrated Cryogenic Quantum Interface”, IEEE Journal of Solid-State Circuits (JSSC), 2025, DOI: 10.1109/JSSC.2025.3530472.

• Jing Wang, Xuan Sun, Lin Cheng, “A Picowatt CMOS Voltage Reference Operating at 0.5-V Power Supply with Process and Temperature Compensation for Low-Power IoT Systems”, IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), 2022, DOI: 10.1109/TCSII.2022.3231216.

• Qi Xu, Lijie Wang, Jing Wang*, Lin Cheng, Song Chen*, Yi Kang, “Graph Attention-Based Symmetry Constraint Extraction for Analog Circuits”, IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2024, DOI: 10.1109/TCSI.2024.3391187. (Co-Corresponding author)

• Jing Wang, Zhiyuan He, Jun He, Yule Xue, Hui Zhang, Lin Cheng, “A 2.69 ppm/°C Bandgap Reference with 42 ppm/V Line Sensitivity for Battery Management System”, 2024 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), DOI: 10.1109/ICTA64028.2024.10860723. (Best Paper)
  

• Jing Wang, Yule Xue, Zhiyuan He, Lin Cheng, “A 0.81 ppm/°C 11.7 μA Voltage Mode Bandgap Reference with Vth-based Piecewise Compensation”, 2024 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), DOI: 10.1109/ICTA64028.2024.10860316.