于业界和学界从事多年CMOS RF/数字混合集成电路与系统设计，主持和深度参与多款雷达/光通/GPS芯片以及相控阵/MIMO架构系统的设计，成果发表于包括ISSCC、JSSC、RFIC、TMTT等会议和期刊，迄今30余篇；受ISSCC组委会等单位邀请，现场演示芯片系统4次

• 2009-2013 浙江大学，博士，电路与系统

• 2013-2013 迦美信芯通信技术有限公司，射频设计工程师

• 2013-2019 新加坡南洋理工大学，博士后研究员/高级研究员

• 2019-2020 新加坡亨芯技术有限公司，主管工程师

• 2021-2023 上海交通大学，助理研究员

• 2023-至今 中国科学技术大学，特任副研究员

●  Z. Fang, K. Tang*, L. Lou*, W. Wang, M. Lu, Y. Guo, G. Jiang and Y. Zheng*, “A Silicon-Based Radio Platform for Integrated Edge Sensing and Communication Toward Sustainable Healthcare”, in IEEE Trans. on Microwave Theory and Techniques (TMTT), Vol.71, no.3, pp. 1296 - 1311, Mar., 2023.

●  Z. Fang, K. Tang*, L. Lou*, W. Wang, B. Chen, Y. Wang, and Y. Zheng*, “A Silicon-Based Adaptable Edge Coherent Radar Platform for Seamless Health Sensing and Cognitive Interactions with Human Subjects”, in IEEE Trans. on Biomedical Circuits and Systems (TBCAS), Vol.16, no.1, pp. 138-152, Feb., 2022.

●  L. Lou, K. Tang, Z. Fang, Y. Wang, B. Chen, T. Guo, X. Feng, S. Liu, W. Wang, and Y. Zheng, “An Early Fusion Complementary RADAR-LiDAR TRX in 65nm CMOS Supporting Gear-Shifting Sub-cm Resolution for Smart Sensing and Imaging”, in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Papers, Feb. 2021, pp. 220-221.

●  K. Tang, L. Lou*, T. Guo, B. Chen, Y. Wang, Z. Fang, C. Yang, W. Wang and Y. Zheng*, “A 4TX/4RX Pulsed Chirping Phased-Array Radar Transceiver in 65nm CMOS for X-Band Synthetic Aperture Radar Application”, in IEEE Journal of Solid State Circuits (JSSC), Vol.55, no.11, pp. 2970 - 2983, Jul., 2020.

●  Z. Fang, L. Lou*, K. Tang*, W. Wang, Y. Wang, T. Guo, C. Yang, and Y. Zheng*, “Wide Field-of-View Locating and Multi-Modal Vital Sign Monitoring Based on X-Band CMOS-Integrated Phased-Array Radar Sensor”, in IEEE Trans. on Microwave Theory and Techniques (TMTT), Vol.68, no.9, pp. 4054 - 4065, May., 2020.

●  L. Lou, K. Tang, B. Chen, T. Guo, Y. Wang, W, Wang, Z. Fang, Z. Liu and Y. Zheng, “A 253mW/channel 4TX/4RX pulsed chirping phased-array radar TRX in 65nm CMOS for X-band synthetic-aperture radar imaging”, in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Papers, Feb. 2018, pp. 160-161.

● L. Lou, B. Chen, K. Tang, S. Liu and Y. Zheng, “An Ultra-wideband Low-power ADPLL Chirp Synthesizer with Adaptive Loop Bandwidth in 65nm CMOS”, in Proc. IEEE Radio Frequency Integrated Circuits (RFIC) Symp., May. 2016, pp. 35-38.