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邮箱:eecheng@ustc.edu.cn
办公室:高新校区1号学科楼B417现任中国科学技术大学集成电路学院教授、博士生导师、副院长。主持国家自然科学基金重点、国家重点研发计划、安徽省重点研发计划以及企业技术合作等项目10余项。以第一/通讯作者发表会议论文 59 篇、SCI期刊论文 31 篇,其中包括集成电路设计顶级会议ISSCC论文21篇、顶级期刊JSSC论文16篇。以第一发明人获美国专利授权5项、中国专利授权16项。担任ISSCC电源管理技术分委会委员,曾任IEEE ICTA指导委员会(2025年)、技术委员会主席(2024年)等学术职务。课题组常年招收集成电路、电子相关专业硕博研究生,有意者请将简历、成绩单发至pmic@ustc.edu.cn。
2004-2008合肥工业大学,学士,电子科学与技术
2008-2011复旦大学,硕士,微电子与固体电子学
2011-2016香港科技大学,博士,电子及计算机工程
2016-2018香港科技大学,博士后
2025年 IEEE New Frontier Award
2024年安徽省教学成果特等奖 (排名 1/18)
2024年/2022年 IEEE ICTA最佳论文奖
2022年安徽省教学成果一等奖 (排名 2/15)
2020年 IEEE ASP-DAC 最佳设计奖
2018年香港科学会青年科学家提名奖
2015年 IEEE 固态电路学会博士成就奖
Z. Liu, Y. Ji, Z. Luo, Y. Ge and L. Cheng*, A 100A 93.4%-Peak-Efficiency LLC Resonant Converter with an Embedded Primary-Current-Extracted Regulator, 2026 IEEE International Solid- State Circuits Conference (ISSCC) 2026.
C. Chen, M. Shang, Y. Ji and L. Cheng*, “A 1.2μs 1-to-12V Symbol Power Tracking Supply Modulator with Two-step Subranging DVS Scheme and Boosted IL Slew Rate for 5G Mobile Devices, 2026 IEEE International Solid-State Circuits Conference (ISSCC) 2026.
M. Shang, B. Wang, C. Chen, J. Jin and L. Cheng*, A 102ns/V 94.3%-Peak-Efficiency Symbol-Power-Tracking Supply Modulator for 5G NR Power Amplifiers, in IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 184-185, Feb. 2025.
Q. Huang, D. Pan, Z. Chen and L. Cheng*, A Dual-LC-Resonant Isolated DC-DC Converter Achieving 65.4% Peak Efficiency and Inherent Backscattering, in IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 534-535, Feb. 2025.
C. Chen, X. Li, R. Hu and L. Cheng*, 31.1 An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 496-498, Feb. 2024. (Highlight Paper, Invited to the special issue of JSSC)
J. Ge, Y. Lu, R. Yang, D. Pan and L. Cheng*, 27.2 A 6.78-MHz 79.5%-Peak-Efficiency Wireless Power Transfer System using a Wireless Mode-Recognition Technique and a Fully-On/off Class-D Power Amplifier, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 446-448, Feb. 2024. (Highlight Paper)
J. Jin, W. Xu and L. Cheng*, 8.1 A 94.5%-Peak-Efficiency 3.99W/mm2-Power-Density Single-Inductor Bipolar-Output Converter with a Concise PWM Control for AMOLED Displays, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 144-146, Feb. 2024. (Highlight Paper,Invited to the special issue of JSSC)
Y. Ji, J. Jin and L. Cheng*, A 12V-Input 1V-1.8V-Output 94.7%-Peak-Efficiency 685A/cm3-Current-Density Hybrid DC-DC Converter with a Charge Converging Phase, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 458-460, Feb. 2024. (Highlight Paper,Invited to the special issue of JSSC)
J. Jin, Y. Zhou, C. Chen, X. Han, W. Xu and L. Cheng*, A 98.6%-Peak-Efficiency 1.47A/mm2-Current-Density Buck-Boost Converter with Always Reduced Conduction Loss IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 448-450, Feb. 2023.
J. Yuan, Z. Liu, F. Wu and L. Cheng*, A 12V/24V-to-1V DSD Power Converter with 56mV Droop and 0.9µs 1% Settling Time for a 3A/20ns Load Transient, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 300-301, Feb. 2022. (Invited to the special issue of JSSC)
D. Pan, G. Li, F. Miao, W. Sun, X. Gong, L. Zhang and L. Cheng*, A 1.2W 51%-Peak-Efficiency Isolated DC-DC Converter with a Cross-Coupled Shoot-Through-Free Class-D Oscillator Meeting the CISPR-32 Class-B EMI Standard, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 240-241, Feb. 2022.
D. Pan, G. Li, F. Miao, B. Deng, J. Wei, D. Yu, M. Liu, and L. Cheng*, A 1.25W 46.5%-Peak-Efficiency Transformer-in-Package Isolated DC-DC Converter Using Glass-Based Fan-Out Wafer-Level Packaging Achieving 50mW/mm2 Power Density, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 468-469, Feb. 2021. (First ISSCC paper from USTC)
L. Cheng*, W. H. Ki, A 30MHz hybrid buck converter with 36mV droop and 125ns 1% settling time for 1.25A/2ns load transient, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 188-189, Feb. 2017.
L. Cheng*, W. H. Ki, Y. T. Wong, T. S. Yim and C. Y. Tsui, A 6.78MHz 6W wireless power receiver with a 3-Level 1×/½×/0× reconfigurable resonant regulating rectifier, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 376-377, Jan. 2016.
L. Cheng*, Y. Liu, W. H. Ki, A 10/30MHz wide-duty-cycle-range buck converter with DDA-based Type-III compensator and fast reference-tracking responses for DVS applications, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 84-85, Feb. 2014. (Invited to the special issue of JSSC)
Z. Liu, J. Yuan, F. Wu, L. Cheng*, A 12V/24V-to-1V PWM-controlled DSD converter with delay-insensitive and dual-phase charging techniques for fast transient responses IEEE Journal of Solid-State Circuits (JSSC), vol. 57, no. 12, pp. 3853-3864, Dec. 2022. (Invited paper)
L. Cheng*, X. Ge, W. C. Ng, W. H. Ki, J. Zheng, T. F. Kwok, C. Y. Tsui, M. Liu, A 6.78-MHz single-stage wireless charger with constant-current constant-voltage charging technique, IEEE Journal of Solid-State Circuits (JSSC), vol. 55, no. 4, pp. 999-1010, Apr. 2020. (Invited paper, first ISSCC paper from USTC)
L. Cheng*, W. H. Ki, C. Y. Tsui, A 6.78-MHz single-stage wireless power receiver using a 3-mode reconfigurable resonant regulating rectifier, IEEE Journal of Solid-State Circuits (JSSC), vol. 52, no. 5, pp. 1412-1423, May 2017.
L. Cheng*, W. H. Ki, Y. Lu and T. S. Yim, Adaptive on/off delay-compensated active rectifiers for wireless power transfer systems, IEEE Journal of Solid-State Circuits (JSSC), vol. 51, no. 3, pp. 712-723, Mar. 2016.
L. Cheng*, Y. Liu, W. H. Ki, A 10/30 MHz fast reference-tracking buck converter with DDA-based Type-III compensator, IEEE Journal of Solid-State Circuits (JSSC), vol. 49, no. 12, pp. 2788-2799, Dec. 2014. (Invited paper)