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余杰特任副研究员
主要研究方向:新型存储器可靠性及存算融合系统验证
电话:
邮箱:yjtech@ustc.edu.cn
办公室:
个人简介:

长期从事新型存算融合技术研究,致力于新材料新原理的半导体器件/阵列存储可靠性、神经形态,类脑计算及大模型计算系统验证研究。

个人经历:


  • 2025年12月至今,中国科学技术大学,特任副研究员

  • 2022年8月2025年11月,复旦大学,博士后

  • 2019年9月-2022年6月,中科院微电子所,微电子学与固体电子学,博士

  • 2016年9月-2019年6月,安徽大学,电路与系统,硕士

荣誉:

  • 2022年上海市“超级博士后”

  • 2023年博士后国家资助计划

  • 2023年主持国家青年科学基金

论文:

  • Jie Yu, Zheng Zhu, Albert Lee, Xiaohan Huang, Yule Zhang, Yu Li, Kaiwen Shen, Yifan Gao, Yingfen Wei, Hao Jiang, Xumeng Zhang, Ming Wang, Di Wu, Xianzhe Chen*, Qi Liu, Ming Liu. 96-Kb Voltage-Controlled-Magnetic-Anisotropy MRAM for In-situ Reservoir Computing with High Endurance (≥1012), Sub-ns Operation (0.3 ns) and Ultralow Power Consumption (40 fJ). 2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). IEEE, 2025.

  • Xuanyu Zhao#, Jie Yu#, Yu Li#, Yiwei Wang, Fansen Cao, Yan Cheng, Yingfen Wei*, Hao Jiang*, Qi Liu*, Ming Liu. First Demonstration of Annealing-free RT-prepared AlScN Film with Large Polarization (2Pr > 300 μC/cm²) and Ultra-Sharp Ec distribution for 0T1C FeRAM. 2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). IEEE, 2025(共同作者)

  • Jie Yu, Chao Li, Xumeng Zhang, Qi Liu, Ming Liu*. Resistive switching devices empower the AI era. Scientia Sinica Informationis, 2025, 55(4):749-765

  • Chao Li#, Jie Yu#, Xumeng Zhang*, Zhaohao Zhang*, Fangduo Zhu, Siyuan Ouyang, Pei Chen, Lingli Cheng, Gaobo Xu, Qingzhu Zhang, Huaxiang Yin, Qi Liu*, Ming Liu. Experimental demonstration of a CT-FeFET array with intrinsic long-short-term plasticity for low-cost trajectory prediction. 2024 IEEE International Electron Devices Meeting (IEDM). IEEE, 2024. (共同作者)

  • Wenxuan Sun, Jie Yu*, Danian Dong, Xu Zheng, Jinru Lai, Shaoyang Fan, Hongzhou Wang, Jianfeng Gao, Junfeng Liu, Xiaoxin Xu*. Investigation on the 3D Memristor Array Architecture for 3D Reservoir Computing System Implementation. IEEE Electron Device Letters 2024,45(8): 1445-1448.(通讯作者)

  • Jie Yu, Wenxuan Sun, Jinru Lai, Xu Zheng, Danian Dong, Qing Luo, Hangbing Lv, Xiaoxin Xu*, “Performance Improvement of Memristor-based Echo State Networks by Optimized Programming Scheme”, IEEE Electron Device Letters, 2022, 43 (6): 866-869.

  • Jie Yu#, Yi Li#, Wenxuan Sun, Woyu Zhang, Zhaomeng Gao, Danian Dong, Zhaoan Yu, Yulin Zhao, Jinru Lai, Qingting Ding, Qing Luo, Chunmeng Dou, Qingyun Zuo, Yuhang Zhao, Shoumian Chen, Rong Zou, Haoyu Chen, Qiwei Wang, Hangbing Lv, Xiaoxin Xu*, Dashan Shang*, Ming Liu, “Energy efficient and robust reservoir computing system using ultrathin (3.5 nm) ferroelectric tunneling junctions for temporal data learning”,2021 Symposium on VLSI Technology. IEEE, 2021: 1-2.

  • Xiaoxin Xu, Jie Yu, Tiancheng Gong, Jianguo Yang, Jiahao Yin, Qing Luo, Jing Liu, Zhaoan Yu, Qi Liu, Hangbing Lv*, Ming Liu*, “First demonstration of OxRRAM integration on 14nm FinFet platform and scaling potential analysis towards sub-10nm node”. 2020 IEEE International Electron Devices Meeting (IEDM). IEEE, 2020: 24.3. 1-24.3. 4.

  • Jie Yu, Xiaoxin Xu*, Tiancheng Gong, Qing Luo, Danian Dong, Peng Yuan, Lu Tai, Jiahao Yin, Xi Zhu, Xiulong Wu, Hangbing Lv*, Ming Liu, “Suppression of filament overgrowth in conductive bridge random access memory by Ta2O5/TaOx Bi-layer structure”, Nanoscale Research Letters, 2019, 14 (1): 1-6.

  • Jie Yu, Xiaoxin Xu, Tiancheng Gong, Qing Luo, Lu Tai, Xiaoyan Li, Peng Yuan, Danian Dong, Jiahao Yin, Qingting Ding, Hangbing Lv*, Ming Liu, “Uniformity and Endurance Enhancement of Valance Changed Resistive Switching Memory (VCM) by a New Pulse Method”. 2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC). IEEE, 2019: 1-2.

  • Qing Luo, Jie Yu, Xumeng Zhang, Kan-Hao Xue, Jun-Hui Yuan, Yan Cheng, Tiancheng Gong, Hangbing Lv, Xiaoxin Xu, Peng Yuan, Jiahao Yin, Lu Tai, Shibing Long, Qi Liu, Xiangshui Miao, Jing Li, Ming Liu, “Nb1-xO2 based Universal Selector with Ultra-high Endurance (> 1012), high speed (10ns) and Excellent Vth Stability”. 2019 Symposium on VLSI Technology. IEEE, 2019: T236-T237.

专利:

  • Xiaoxin Xu, Jie Yu, Danian Dong, Zhaoan Yu, Hangbing LvMemory circuit structure and method of operating memory circuit structure. 专利号:US12260911B2

  • 许晓欣,余杰,董大年,李晓燕,郑旭,吕杭炳,刘明忆阻器、制备方法及全忆阻器基的神经形态计算芯片”. 专利号:CN113517391B